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CXA3541N
2-channel Read/Write Amplifier for GMR-Ind Head Hard Disk Drive
Description The CXA3541N is a read/write amplifier for GMR-Ind (Giant Magneto Resistive-Inductive) heads used in hard disk drives, and is capable of supporting up to two channels. Features * +5V and -3V power supply * Current bias voltage sense type * Low power 180mW at read * Differential read amplifier gain; x100/135 (RMR = 50) * Input noise of 0.77nV/ Hz (typ.), RMR = 50, IB = 5.9mA * Recovery time write to read; 300ns (typ.) * Write data is triggered by differential P-ECL signal * Servo bank write * Write unsafe detection circuit * Serial port Head selection MR bias Write current Applications Hard disk drives with GMR-Ind heads Structure Bipolar silicon monolithic IC 24 pin SSOP (Plastic)
Absolute Maximum Ratings (Ta = 25C) -0.3 to +5.8 V * Supply voltage VCC * Supply voltage VEE -3.7 to +0.3 V * Digital input voltage Vdi -0.3 to VCC + 0.3 V * Operating temperature Topr 0 to +70 C * Storage temperature Tstg -55 to +150 C * Allowable power dissipation PD 800 mW (on board) Operating Conditions * Supply voltage * MR bias voltage * Bias current * Write current
VCC VEE VMR IB IW
4.4 to 5.5 V -3.5 to -2.6 V -300 to +300 mV 3 to 8 mA 19.5 to 49.5 mA
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E00205-PS
CXA3541N
Block Diagram and Pin Configuration
SCLK SDATA WDX WDY VCC GND RDY RDX FLT/SE/BHV
1 2 3
Serial Interface
Bias Current Source Write Current Source
24 RS 23 NC 22 R1Y AMP 21 R1X 20 W1Y DRIVER 19 W1X 18 W0X
WD BUF 4 5 6 7 AMP 8 9
DRIVER 17 W0Y 16 R0X AMP 15 R0Y 14 NC 13 CAP
R/XW 10 SDEN 11 VEE 12
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CXA3541N
Pin Description Pin No. Symbol Equivalent circuit
VCC
Description
1
1 2 11
SCLK SDATA SDEN
7.5k
2 11 14k 2Vf GND VEE VCC
Serial control signal input.
100
3 4
WDX WDY
3 4 100
Differential P-ECL write data input.
GND VEE
5 6
VCC GND
VCC 100
5V power supply. Ground.
7 8
RDY RDX
7 8 1.8mA GND VEE
VCC
Read amplifier output with coupling capacitors. High impedance in the write mode.
9
FLT/SE/BHV
9
Head unsafe detection output. Servo bank write enable input. Buffered head voltage output.
GND VEE
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CXA3541N
Pin No.
Symbol
Equivalent circuit
Description
VCC
10
R/XW
10 3Vf
Read/write control signal input. Read when high, write when low.
GND VEE
12
VEE
-3V power supply.
VCC
13
CAP
13
Connect an external capacitor of read amplifier between this pin and VEE.
VEE
14 23
NC
Non connection.
VCC
16 15 21 22
R0X R0Y R1X R1Y
16 21 15 22
MR heads for read. Two channels are provided.
VEE
VCC
18 17 19 20
W0X W0Y W1X W1Y
18 19 17 20
Inductive heads for write. Two channels are provided.
GND VEE
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CXA3541N
Pin No.
Symbol
Equivalent circuit
VCC
Description
24
RS
250 24 VBGR = 1.3V GND VEE
Bias current setting register is connected between this pin and GND.
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CXA3541N
Electrical Characteristics (Unless otherwise specified; VCC = 5V, VEE = -3V, Ta = 25C, CAP = 0.1F, RS = 7.5k) No. 1-1 1-2 1-3 1-4 1-5 1-7 1-8 1-9 Bank write mode VEE power supply current VCC power supply current Item Symbol IW = 29.5mA, IB = 5.9mA ISP1 IID1 IRE1 IWR1 IID2 IRE2 IWR2 ICCBW Sleep mode Idle mode Read mode Write mode Idle mode Read mode Write mode ICCBW = 17 + 17 x N + IW x N IW = 29.5mA 2.15 22 37 98 10 10 10 111 2.85 29 48 130 13 13 13 mA mA mA mA mA mA mA mA Measurement conditions Min. Typ. Max. Unit
Power Dissipation
Digital Inputs 2-1 2-2 2-3 2-4 2-5 2-6 3-1 3-2 3-3 3-4 TTL input low input voltage TTL input high input voltage TTL input input current Serial interface input low input voltage Serial interface input high input voltage Serial interface input input current P-ECL common voltage P-ECL high voltage P-ECL input current VIL VIH ITTL VSIL VSIH VST VPC VPH IWD Input voltage: 4V -20 VCC + 1.2 6 Open collector output External resistance = 2.4k Open collector output External resistance = 2.4k VBHV = VCC - 4 x IB x (RMR + 5.5) IB = "111", RMR = 50 4.5 -8 8 TTL input; R/XW Internal pull-up resistor High voltage: 5V Low voltage: 0V Serial input; SDATA, SCLK, SDEN High voltage: 3.3V Low voltage: 0V Pull-down resistor: 14k (VH + VL)/2 (VH - VL) 0 2.0 -200 0.8 VCC + 0.3 200 0.8 2.35 -500 1.55 0.2 500 VCC 1.5 VCC 20 VCC + 1.4 14 0.8 V V A V V A V V V A
P-ECL differential voltage VPD
Power Dissipation 4-1 4-2 5-1 5-2 6
IW = 29.5mA, IB = 5.9mA V mA V V %
Bank write enable voltage VSEH Bank write enable current ISEH FLT output low voltage FLT output high voltage BHV gain accuracy VFLTL VFLTH EBHV
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CXA3541N
No.
Item
Symbol RMR = 50, IB = 5.9mA AVL AVH FCL FCH ENi IBR1 EIB RIB PSRR1 PSRR2 CMRR1 CMRR2 CLRR VOFF1 RDro
Measurement conditions Gain = 0 RMR = 50, IB = 5.9mA Gain = 1 RMR = 50, IB = 5.9mA
Min.
Typ.
Max.
Unit
Read Characteristics R1 R2 R3 R4 R5 R6 R7 R8 R9-1 R9-2 R10-1 R10-2 R11 R12 R13 Low gain High gain
82 110
100 135 350
118 160 550
V/V V/V kHz MHz
Low frequency cut-off (-3dB) High frequency cut-off (-3dB) Input reflected noise MR bias current range 1 MR bias accuracy MR bias resolution VCC power supply rejection ratio VEE power supply rejection ratio Common mode rejection ratio 1 Common mode rejection ratio 2 Control line input noise rejection RDX/RDY offset difference magnitude RDX/RDY output impedance MR head open threshold MR head short threshold
140 Exclusive of head noise RMR = 50, IB = 5.9mA 3 -7 3-bit DAC Ripple voltage: 100mVp-p 100kHz to 50MHz Ripple voltage: 100mVp-p 100kHz to 10MHz Ripple voltage: 100mVp-p 100kHz to 50MHz Ripple voltage: 100mVp-p 51MHz to 80MHz Ripple voltage: 100mVp-p 4MHz to 80MHz Write to read Differential, read mode 30 38 45 37 27 40
200 0.77 0.95 8 +7 0.714
nV Hz mA % mA dB dB dB dB dB
50 100
mV
Read Safety Characteristics P1 P2 MRop MRsh Head X - Head Y Head X - Head Y IB = "000" to "011" DAC code = x "0000" to x "1111" RH = 0 4-bit DAC Unselected head 800 LH = 0, RH = 0 Write data to 50% of write current RH = 15, LH = 150nH, IW = 25mA VCC = 3.5V DAC code = x "0101" Refer to Fig. -7- -18 1.9 -9 0 1000 600 15 750 50 900 90 mV mV
Write Characteristics W1 W2 W3 W4 W6 W7 W8 W9 W10 Write current range Write current accuracy Write current resolution Leakage current Damping resistor Write current propagation delay time IWR EIW RIW ILEAK RD Tpd 19.5 -7 2 200 1200 10 49.5 +7 mA % mA A ns ns %
Write current rise/fall time TR/TF Erase current accuracy Bank write current accuracy EIE
CXA3541N
No. U1 U2 U3 U4 U5 U6 U7
Item Write head open threshold Head voltage when short to GND WD frequency too low Write safety detect time Low VCC threshold Low VCC threshold
Symbol Rop VG fWDL Tws VWthL VWthH
Measurement conditions Detect open head Detect short to GND
Min.
Typ. 1.2
Max. 1.4 0.1
Unit V V MHz ns V V mV
Write Safety Characteristics
0.5 T1: 2 transitions on WDX/WDY Fault detected Fault removed 3.7 3.9 3.9 4.1 200 Signal on WDX/WDY 90% RD signal or 10% IW 90% IW 90% RD signal 90% RD signal, 90% IB1 IB = "011" 90% IW 10% IW 90% IW 600
1.8 300 + T1 4.1 4.3
Low VCC threshold hysteresis Vhys Iw = 29.5mA, IB = 5.9mA TWR TRW TIR TSR1
Switching Characteristics S1 S2 S3 S4 Write to Read Read to Write Idle to Read Sleep to Read
300 50
500 70 1.0 2000
ns ns s s
Bank Write Characteristics S5 S6 S7 Read to Bank write Bank write to Read Idle to Bank write Idle to Write Setup time Hold time SCLK frequency SCLK pulse width
Iw = 29.5mA, IB = 5.9mA TRB TBR TIW 100 100 300 ns ns s
Serial Port Timing B1 B2 B4 B5 B6 B7 B8 TSU (sden) SDEN to first SCLK Th (sden) f (sclk) Tw (sclk) TSU (d) Th (d) TSL 10 10 10 100 Last SCLK to deassert SDEN 30 15 30 ns ns MHz ns ns ns ns
SCLK - SDATA setup time SCLK - SDATA hold time SDEN low time
1 TSR is proportional to IB and external CAP value.
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CXA3541N
Serial Port Characteristics ADR1 0 0 1 ADR0 0 1 0 DATA5 XSLP GAIN MROPN DATA4 XIDL BHV MRSHT DATA3 N/A N/A IW3 DATA2 N/A IB2 IW2 DATA1 N/A IB1 IW1 DATA0 HS IB0 IW0
IB[2:0] bits are initialized by "0" at power on. Code Description Bit XSLP XIDL HS GAIN BHV IB[2:0] MROPN MRSHT IW[3:0] Function 0 = Set the pre-amplifier into low power "sleep" mode. 0 = Set pre-amplifier to idle mode. Head select bit. Set the pre-amplifier to high or low gain mode. 1 = Set pre-amplifier to high gain mode. Active the BHV test point pin. "1" active. MR bias current set. 1 = Set MR head open detector active. 1 = Set MR head short detector active. Set write current.
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CXA3541N
Mode Control
SLEEP XSLP = 0
READ XSLP = 1 XIDL = 1 R/XW = H
IDLE XSLP = 1 XIDL = 0 R/XW = X
WRITE XSLP = 1 XIDL = 1 R/XW = L
Serial Port Timing Detail
TSL SDEN f (sclk) Tsu (sden) Th (sden) Tw (sclk)
SCLK Th (d) Tsu (d) SDATA A1 A0 D5 D4 D3 D2 D1 D0
Serial Port Timing After the SDEN goes high, the last eight bits are transferred into the register. The SCLK will shift the data presented at SDATA into an internal shift register on the rising edge of each clock. As SCLK initial condition, both of low and high signal is acceptable.
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CXA3541N
Unsafe Condition 1. Write fault condition FLT is a high level in write fault condition. * Open write head leads. fWD < 15MHz * Write head leads shorted to ground. * WD frequency is too low. * Power supply is out of tolerance. 2. Read fault condition FLT is a low level in read fault condition. * Open short MR head. (This function is set by serial resister.) Bank Write Control (Refer to Bank "Write current vs. Current accuracy" characteristic curve) 1. Set the read mode. 2. Force a certain voltage (min. VCC + 1.2V) to FLT/SE pin by using the pull-up register. (RSE = 820) #This operation disables all fault detection. 3. Set VCC at 3.5V (in case of the erase mode only) 4. Start the write operation by setting R/XW = L. 5. Terminate the write operation by setting R/XW = H. i) Allow 50% write duty or less. ii) Low voltage detector is disabled in the bank write mode and erase mode. iii) Don't change the serial register data bits in following conditions: * VCC = 3.5V * On entering write data. BHV (Buffered Head Voltage) 1. Applicable within VCC = 5V 5%. 2. Turn BHV on, but turn off MROPN and MRSHT. 3. VBHV is determined by basis of VCC. VBHV = VCC - (4 x IB x (RMR + 5.5)) Head Condition 1. Short X-Y terminal on un-used write head. 2. Recommended X-Y terminal on un-used read head short. Polarity 1. Read output signal on RDX is negative, when MRX is positive by increasing RMR. 2. Write current flows into X side, when WDX is high and WDY is low. Head Select Table (2ch) HS 0 1 Normal operation 0 1 - 11 -
CXA3541N
MR Bias IB2 0 0 0 0 1 1 1 1 IB1 0 0 1 1 0 0 1 1 IB0 0 1 0 1 0 1 0 1 IB [mA] 3.0 3.714 4.429 5.143 5.857 6.571 7.286 8.0
Write Current IW3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 IW2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 IW1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 IW0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Write current [mA0-P] 19.5 21.5 23.5 25.5 27.5 29.5 31.5 33.5 35.5 37.5 39.5 41.5 43.5 45.5 47.5 49.5
Actual head current is defined by the following equation: IHEAD = IW/(1 + RH/RD) RH: Head resistance RD: Damping resistance
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CXA3541N
Electrical Characteristics Measurement Circuit
7.5k 1 2 3 V WDX 3300H 1F VPSRR R13 1.5k S7 S6 10F V WDY 5 1000pF 6 7 1000pF VM1 V R14 1.5k 1000pF V SE Amp2 Gain = x100 V R/XW 11 SDEN VEE BPF 100kHz to 50MHz V VM2 12 VEE 1k S/I 3300H VPSRR' 1F S7' S6' CAP 13 NC 14 10 R/XW R0Y 15 VCC 2.4k 8 9 RDX FLT/SE/BHV W0Y R0X 17 25 16 25 GND RDY W1X W0X 19 18 150nH VCC W1Y 20 150nH 4 WDY R1X 21 SCLK SDATA WDX RS NC R1Y 24 23 25 22 25
Amp1 Gain = x1
0.1F
0.1F
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CXA3541N
Application Circuit
7.5k 1 2 3 4 5V 0.1F 6 7 8 9 GND RDY RDX FLT/SE/BHV W1X W0X W0Y R0X R0Y NC CAP 19 18 17 16 15 14 13 5 SCLK SDATA WDX WDY VCC RS NC R1Y R1X W1Y 24 23 22 21 20
10 R/XW 11 SDEN -3V 0.1F 12 VEE
0.1F
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
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CXA3541N
Normalized bias current vs. Ambient temperature
1.04 VCC = 5V VEE = -3V RMR = 50 IBn = "100" IB/IB (VCC = 5V) 1.04
Normalized bias current vs. Power supply voltage
VEE = -3V RMR = 50 IBn = "100" Ta = 25C
1.02 IB/IB (Ta = 25C)
1.02
1.00
1.00
0.98
0.98
0.96
-25.0
0.0
25.0
50.0
75.0
0.96 3.5
4.0
4.5
5.0 VCC [V]
5.5
6.0
6.5
Ta - Ambient temperature [C]
Normalized read amplifier voltage gain vs. Ambient temperature
1.06 VCC = 5V VEE = -3V RMR = 50 IBn = "100" High gain 1.04
Normalized read amplifier voltage gain vs. Power supply voltage
VEE = -3V RMR = 50 IBn = "100" High gain Ta = 25C
1.04 AV/AV (Ta = 25C)
1.02 AV/AV (VCC = 5V)
1.02
1.00
1.00
0.98 0.96
0.98
0.94
-25.0
0.0
25.0
50.0
75.0
0.96 3.5
4.0
4.5
Ta - Ambient temperature [C]
5.0 VCC [V]
5.5
6.0
6.5
Bank write current vs. Current accuracy
0 -2 Bank write current accuracy [%] -4 -6 -8 -10 -12 -14 -16 VCC = 5V Ta = 25C RH = 0 Read 170s Write 30s with Write Data
15
20
25
30
35
40
45
50
55 Deviation of bank write current is within 7% at basis of the chart.
Bank write current [mA]
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CXA3541N
Input refered noise voltage vs. Ambient temperature
0.82 VCC = 5V VEE = -3V RMR = 50 IBn = "100" IW/IW (Ta = 25C) 1.04
Normalized write current vs. Ambient temperature
VCC = 5V VEE = -3V IWn = "0101"
0.80
1.02
0.78 EN [nV/Hz]
1.00
0.76
0.98
0.74
0.72
0.96
0.70
-25.0
0.0
25.0
50.0
75.0
0.94
-25.0
0.0
25.0
50.0
75.0
Ta - Ambient temperature [C]
Ta - Ambient temperature [C]
Normalized write current vs. Power supply voltage
1.04 4.15
Power supply ON/OFF detector threshold voltage vs. Ambient temperature
4.10 1.02 IW/IW (VCC = 5V) Power supply ON/OFF detector threshold voltage [V]
4.05 ON OFF OFF ON
1.00
4.00
3.95
0.98
VEE = -3V IWn = "0101" Ta = 25C 4.0 4.5 5.0 VCC [V] 5.5 6.0 6.5
3.90
0.96 3.5
3.85
-25.0
0.0
25.0
50.0
75.0
Ta - Ambient temperature [C]
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CXA3541N
Package Outline
Unit: mm
24PIN SSOP(PLASTIC)
+ 0.2 1.25 - 0.1 7.8 0.1 0.1 13
24
A
1 b
12
0.13 M B 0.65
5.6 0.1
+ 0.05 0.15 - 0.02
0.5 0.2
DETAIL B : SOLDER 0 to 10
(0.15)
0.1 0.1
(0.22)
b=0.22 0.03
DETAIL B : PALLADIUM
NOTE: Dimension "" does not include mold protrusion. DETAIL A
PACKAGE STRUCTURE
PACKAGE MATERIAL EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 0.1g LEAD TREATMENT LEAD MATERIAL PACKAGE MASS
SONY CODE EIAJ CODE JEDEC CODE
SSOP-24P-L01 SSOP024-P-0056
NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
- 17 -
+ 0.03 0.15 - 0.01
+ 0.1 b=0.22 - 0.05
7.6 0.2
Sony Corporation

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